11 entries « ‹ 1 of 2
› » 2019
Sapounaki, Maria; Kakarountas, Athanasios
A High-Performance Neuron for Artificial Neural Network based on Izhikevich model Proceedings Article
In: 2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS), pp. 29–34, IEEE 2019.
@inproceedings{sapounaki2019high,
title = {A High-Performance Neuron for Artificial Neural Network based on Izhikevich model},
author = {Maria Sapounaki and Athanasios Kakarountas},
year = {2019},
date = {2019-01-01},
booktitle = {2019 29th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)},
pages = {29--34},
organization = {IEEE},
keywords = {Digital Circuits, FPGA, Hardware Accelerator},
pubstate = {published},
tppubtype = {inproceedings}
}
2017
Chioktour, Vasileios; Spathoulas, Georgios; Kakarountas, Athanasios
Systolic Binary Counter using a Cellular Automaton-based Prescaler Proceedings Article
In: Proceedings of the 21st Pan-Hellenic Conference on Informatics, pp. 1–4, 2017.
@inproceedings{chioktour2017systolicb,
title = {Systolic Binary Counter using a Cellular Automaton-based Prescaler},
author = {Vasileios Chioktour and Georgios Spathoulas and Athanasios Kakarountas},
year = {2017},
date = {2017-01-01},
booktitle = {Proceedings of the 21st Pan-Hellenic Conference on Informatics},
pages = {1--4},
keywords = {Digital Circuits, FPGA, Hardware Accelerator},
pubstate = {published},
tppubtype = {inproceedings}
}
2015
Pirpilidis, F; Kitsos, P; Kakarountas, A
A compact design of SEED block cipher Proceedings Article
In: 2015 4th Mediterranean Conference on Embedded Computing (MECO), pp. 119-123, 2015.
@inproceedings{7181881,
title = {A compact design of SEED block cipher},
author = {F Pirpilidis and P Kitsos and A Kakarountas},
doi = {10.1109/MECO.2015.7181881},
year = {2015},
date = {2015-01-01},
booktitle = {2015 4th Mediterranean Conference on Embedded Computing (MECO)},
pages = {119-123},
keywords = {FPGA, Hardware Accelerator},
pubstate = {published},
tppubtype = {inproceedings}
}
2011
Hatzidimitriou, E; Kakarountas, A P; Milidonis, A
Exploration and enhancement of P1619-based crypto-cores for efficient performance Proceedings Article
In: 2011 IEEE International Conference on Consumer Electronics (ICCE), pp. 361-362, 2011.
@inproceedings{5722628,
title = {Exploration and enhancement of P1619-based crypto-cores for efficient performance},
author = {E Hatzidimitriou and A P Kakarountas and A Milidonis},
doi = {10.1109/ICCE.2011.5722628},
year = {2011},
date = {2011-01-01},
booktitle = {2011 IEEE International Conference on Consumer Electronics (ICCE)},
pages = {361-362},
keywords = {Computer Architecture, FPGA, Hardware Accelerator, security},
pubstate = {published},
tppubtype = {inproceedings}
}
2010
Hatzidimitriou, E; Kakarountas, A P
Implementation of a P1619 crypto-core for Shared Storage Media Proceedings Article
In: Melecon 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference, pp. 597-601, 2010.
@inproceedings{5476018,
title = {Implementation of a P1619 crypto-core for Shared Storage Media},
author = {E Hatzidimitriou and A P Kakarountas},
doi = {10.1109/MELCON.2010.5476018},
year = {2010},
date = {2010-01-01},
booktitle = {Melecon 2010 - 2010 15th IEEE Mediterranean Electrotechnical Conference},
pages = {597-601},
keywords = {Computer Architecture, Embedded Systems, FPGA, security},
pubstate = {published},
tppubtype = {inproceedings}
}
2007
Kakarountas, A P; Michail, H; Goutis, C E; Efstathiou, C
Implementation of HSSec: a High–Speed Cryptographic Co-Processor Proceedings Article
In: 2007 IEEE Conference on Emerging Technologies and Factory Automation (EFTA 2007), pp. 625-631, 2007.
@inproceedings{4416827,
title = {Implementation of HSSec: a High–Speed Cryptographic Co-Processor},
author = {A P Kakarountas and H Michail and C E Goutis and C Efstathiou},
doi = {10.1109/EFTA.2007.4416827},
year = {2007},
date = {2007-01-01},
booktitle = {2007 IEEE Conference on Emerging Technologies and Factory Automation (EFTA 2007)},
pages = {625-631},
keywords = {Computer Architecture, FPGA, Hardware Accelerator, security},
pubstate = {published},
tppubtype = {inproceedings}
}
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